A 140-GHz RF Beamforming Phased-Array Receiver in 22-nm CMOS FDSOI for 6G Communication


IEEE Radio Frequency Integrated Circuits Symposium



Research Areas


A 140-GHz 4-element RF-beamforming phased-array receiver (RX) has been demonstrated in 22-nm FDSOI CMOS. The proposed single-side-band (SSB) architecture provides >25-dB and >20-dB measured image rejection ratio (IRR) across 4-GHz and 8-GHz channel bandwidth centered at 7-GHz intermediate frequency (IF). Each front-end element consists of a wideband low-noise amplifier (LNA) and a vector-modulator phase shifter. 4 elements are combined on chip through power combiners and variable gain driver amplifiers before the double-balanced mixer, which is driven by an on-chip multiplier (×9). The receiver consumes 120mW DC power per element and provides <10dB noise figure from 135 to 147 GHz. The measured phase shifter root-mean-square (RMS) phase error is 1.4° with resolution of 3° at 140 GHz. With 64-QAM waveforms, the RX is measured up to 24 Gb/s in both the probe and over-the-air test. To the authors’ knowledge, this CMOS RF-beamforming RX achieves the lowest DC power per element and largest channel bandwidth with 20-dB IRR among the published phased-array RX in the 140-GHz band.